SoC Physical Design Engineer, Top Level
Core
Implement complete chip design from netlist to tapeout, focusing on top-level physical design and flow optimization.
Role type
Senior IC SoC Physical Design Engineer (Top Level)
Builds
System-on-Chip (SoC) hardware products
Domain
Semiconductor / Hardware Design
Required skills
Top-level place and route (P&R) implementation, floorplanning, clock and power distribution, timing closure, physical and electrical verification, physical design construction and analysis flows, industry standard EDA tools
Preferred skills
Top-level P&R experience, methodology development, cross-domain dependency management
Responsibilities
Collaborate with Front-End teams to understand chip architecture and drive physical aspects early, establish physical design methodologies and guidelines, lead place and route execution and planning, resolve design and flow issues
Seniority
Senior, hands-on IC
