CareerPlan

Senior Design Verification Engineer

United States, Washington, RedmondFull-time2026-10-16 → 2026-11-10
Citizens or permanent residents only

Core

Lead pre-silicon verification and post-silicon validation for custom Intellectual Property (IP) components, defining strategies and executing end-to-end verification plans at block, sub-system, or system levels.

Role type

Senior IC design verification engineer (pre-silicon & post-silicon)

Builds

Custom IP components, ASICs, and System on Chips (SoCs)

Domain

Semiconductor hardware design and verification

Required skills

UVM methodology, C/C++ programming, silicon bring-up, test plan development, coverage closure, formal verification (Jasper), chip architecture knowledge, firmware development for processors

Preferred skills

AI-based tools and agents, mentorship, cross-team collaboration

Technologies

UVM, Jasper, C, C++, FPGA, ASIC, SoC

Responsibilities

Define pre-Si verification and post-Si validation strategies; Execute end-to-end verification plans; Collaborate on component reuse; Provide technical leadership through mentorship; Adopt AI-based tools for efficient execution

Seniority

Senior, hands-on IC