Senior Circuit Design Engineer
Core
Develop Memory SRAM and Register file solutions to address difficult PPA challenges for SoC designs.
Role type
Senior IC circuit design engineer (memory)
Builds
Memory IP blocks (SRAM, Register files) for advanced process technology testchips and SoCs
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models | product features
Required skills
SRAM and Register file design, timing/power/EMIR characterization, advanced process technology (DTCO), layout design guidance, yield and reliability analysis, scripting automation, statistical analysis methodologies
Preferred skills
Understanding of SRAM write/read assist techniques, experience providing technical guidance to other engineers, multitasking across multiple SoC programs
Technologies
Advanced process technologies, DTCO tools, scripting automation flows
Responsibilities
Collaborate with SoC designers on PPA challenges, work with process technology teams to exploit DTCO knobs, devise statistical analysis methodologies, run QA checks on IP collateral, develop IP and post-silicon characterization plans, develop scripting automation for flows
Seniority
Senior, hands-on IC