Principal Design Verification Engineer
Core
Creating complex verification environments and tests for pre-silicon functional verification at block, chip, and system levels, plus post-silicon validation.
Role type
Principal Design Verification Engineer (IC/SoC)
Builds
Silicon IP, SoCs, and embedded systems
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog, UVM, Verilog, VHDL, C/C++, Python, Ruby, Perl, scoreboards, sequences, constraints, assertions, functional coverage, testbench development, simulation, emulation, FPGA, hardware emulation, firmware development, secure boot flow, synthesizable code, hardware design for embedded systems, CPU or Graphics core verification, chip and computer architecture knowledge
Preferred skills
Agile development methodologies, code reviews, sprint planning, frequent deployment, Makefiles, scripts for scalable verification
Responsibilities
Create and drive test-plans and test development to provide complete features coverage; Triage and debug testbench, simulation, and emulation fails; Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage; Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification; Develop and implement technical solutions to complex quality and design challenges; Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation
Seniority
Principal, hands-on IC with strategy & mentorship
