Senior Quantum Analog Mixed-Signal Verification Engineer
Core
Creating system-wide Analog Mixed-Signal (AMS) models, simulation environments, and test plans for System-on-a-Chip (SoC) and Intellectual Property (IP) blocks, integrating analog and digital blocks for system-level algorithm modeling.
Role type
Senior IC Analog Mixed-Signal Verification Engineer
Builds
Verified analog and mixed-signal designs for mass production
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features
Required skills
Analog Mixed-Signal (AMS) verification, Behavioral modeling, Electronic Design Automation (EDA) tools (Cadence, Mentor, Synopsys), Universal Verification Methodology (UVM) or Open Verification Methodology (OVM), Silicon characterization, MATLAB, Python, Perl, Analog block expertise (VCOs, charge pumps, OTAs, PLLs, ADCs/DACs, SerDes)
Preferred skills
AI tools for performance modeling and automation
Technologies
Synopsys XA, Cadence Spectre AMS, Python, Perl, MATLAB
Responsibilities
Define system-wide AMS models and simulation environments, Coordinate with Analog Verification Engineers for block-level and top-level simulations, Build behavioral models for analog components, Document results and drive design resolution, Establish standardized AMS verification methodology, Screen and onboard contractors
Seniority
Senior, hands-on IC