CareerPlanSign in

Senior Mixed Signal Design Engineer

US, CA, Santa ClaraFull-time$196,000–$196,0002026-04-16 → 2026-10-17

Core

Lead the design of CMOS high-speed interface circuits and mixed-signal circuits, including silicon validation, debugging, and characterization.

Role type

Senior IC mixed-signal design engineer (high-speed interfaces)

Builds

High-speed transceivers, high-frequency PLLs, and mixed-signal circuits for NVIDIA products

Domain

Semiconductor / Deep submicron CMOS / High-speed digital interfaces

Required skills

CMOS analog/mixed-signal circuit design, high-speed transceiver design, PLL design, silicon bring-up and debugging, lab instrumentation, Cadence custom design tools, timing analysis, deep submicron CMOS process knowledge

Preferred skills

System-level timing budget analysis, signal integrity, power integrity, Verilog, Matlab, Primetime, Nanotime

Technologies

Cadence, Verilog, Matlab, Primetime, Nanotime

Responsibilities

Lead design and implementation of high-speed interface circuits, design high-speed transceivers and high-frequency PLLs, simulate and verify mixed-signal circuits, supervise IC circuit/mask designers, support lab characterization of silicon, take designs through implementation and productization

Seniority

Senior, hands-on IC