Senior/Staff Engineer - Logical Design
Core
Architect and implement advanced micro-architectures for silicon components, ensuring optimal performance, power, and area (PPA) metrics for in-house AI products.
Role type
Senior/Staff IC logical design engineer (silicon/RTL)
Builds
Custom AI SoCs and silicon components
Domain
Semiconductor hardware design / AI infrastructure
Deliverable
production ML models
Required skills
RTL coding and synthesis, digital design, SoC integration, IP integration (PCIe, LPDDR), EDA tool mastery, timing closure, low-power design, clock domain crossing, scripting (Python, shell, Tcl)
Preferred skills
Design-for-manufacturability (DFM), Design-for-test (DFT)
Technologies
Verilog, EDA tools
Responsibilities
Architect micro-architectures from high-level specifications, conduct block and system-level RTL coding, integrate IPs/Sub IPs into top-level SoC, perform static checks (lint, cdc, equivalence checks), automate tasks via scripting, conduct functional verification, engage in design reviews, collaborate with physical design engineers on DFM and DFT
Seniority
Senior/Staff, hands-on IC
