异构加速FPGA设计工程师
Core
Design heterogeneous AI chip+FPGA architectures for 6G wireless systems, focusing on high-flexibility, low-latency, and low-power AI acceleration for physical layer processing.
Role type
Senior IC FPGA design engineer (AI/6G)
Builds
Heterogeneous processing solutions for wireless AI RAN and satellite logic circuits
Domain
Wireless communications (6G) + FPGA hardware acceleration
Deliverable
production ML models
Required skills
Verilog, C, Vivado, Quartus, VCS, Verdi, UVM, Python, Matlab, PCIe, AXI/AHB/APB buses, baseband algorithms
Preferred skills
AI chip architecture, FPGA data exchange acceleration, satellite FPGA design
Responsibilities
Propose AI RAN solutions using FPGA acceleration for physical layer AI; Deliver FPGA heterogeneous logic designs with optimization for matrix operations and parallel processing
Seniority
Senior, hands-on IC
