Principal ASIC Test Development Engineer
Core
Developing testability solutions, DFT strategies, and ATE-level tests for high-performance ASICs, memories, and 2.5D SiPs to ensure manufacturability and high fault coverage.
Role type
Principal ASIC Test Development Engineer (IC)
Builds
Production-ready ASICs, memory chips, and 2.5D SiPs for Juniper's edge-to-cloud products
Domain
Semiconductor manufacturing, ASIC design, and high-performance computing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
DFT (Design-for-Test) strategy, MBIST, IOBIST, LBIST, JTAG, scan/ATPG, IEEE 1149/1687 standards, ATE validation, fault model development, supplier test correlation, NTF issue resolution, cross-functional technical leadership
Preferred skills
Patents, published technical papers, conference presentations, advanced test mode development, TSV/HBM/3D IC expertise
Technologies
ATE, JTAG, IEEE 1149, IEEE 1687, MBIST, IOBIST, LBIST, scan, ATPG, 2.5D SiP, TSV, HBM DRAM
Responsibilities
Develop DFT solutions and test strategies for ASICs and SiPs; collaborate with design teams to enable DFT features and integrate diagnostics; resolve high DPPM issues at EMS partner sites; advocate for test coverage gaps and new fault models; influence supplier testing to implement manufacturability modes; serve as trusted advisor from ASIC kick-off to production release
Seniority
Principal, hands-on IC with strategic influence
