CareerPlan

Software Engineer(VIP)

Taipei, TWN, TaiwanFull-time2026-07-29 → 2026-11-10
Hybrid

Core

Develop comprehensive verification IPs for high-speed interfaces and coherency protocols to help design teams find bugs faster.

Role type

Verification IP Engineer

Builds

Verification components (IPs) for chip, board, and system design

Domain

Semiconductor / Electronic Design Automation

Required skills

System Verilog, UVM, Assertions, Coverage, Test plan design, BFM design, Debug, Logger, PCIe, USB, SATA, NVMe, Flash, DIMM

Preferred skills

Knowledge of CXL, LPDDR5, DDR5, 400Gigabit Ethernet

Technologies

SV, UVM, PCIe Gen5/Gen6, USB3.2, CXL

Responsibilities

Specify, implement, test, and enhance verification components; Work on test bench design and verification methodologies; Collaborate with TMEs, Field AEs, or customers to deploy or resolve issues

Seniority

Mid-level (2-6 years experience)