Sr. Staff Pre-Silicon Validation/Verification Lead
Core
Leading system-level validation for high-speed interconnect solutions (PCIe, CXL, NVMe, UCIe) across emulation and FPGA prototyping platforms.
Role type
Senior Staff Pre-Silicon Validation/Verification Lead
Builds
High-speed interconnect solutions for chip, board, and system design
Domain
Electronic Design Automation (EDA), High-speed Interconnects
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, SystemC, C/C++, emulation platforms (Veloce, Palladium, ZeBu), FPGA prototyping, HW/SW co-verification, CI/CD pipeline development, regression strategy, root-cause analysis, CPU architecture, memory hierarchy, IOMMU, coherency, virtualization, bare-metal testing, Linux drivers, firmware, Python, Bash
Preferred skills
None stated
Technologies
SystemC, UVM, SystemVerilog, Veloce, Palladium, ZeBu, PCIe, CXL, NVMe, AXI, UCIe, Python, Bash
Responsibilities
Lead verification and validation activities for high-speed interconnect protocols; Define and drive end-to-end pre-silicon verification strategies; Build and scale verification environments; Drive system-level validation including performance and interoperability analysis; Own regression strategy and coverage tracking; Develop and maintain scalable CI/CD pipelines; Lead deep debugging and root-cause analysis; Mentor engineers and drive high-quality verification sign-off
Seniority
Senior Staff, hands-on IC with leadership
