Digital IC Design Engineering Intern
Core
Design RTL blocks and verify digital subsystems for next-generation mixed-signal ICs in data communications and broadcast video product lines.
Role type
Digital IC Design Engineering Intern
Builds
Advanced digital subsystems for Semtech's Signal Integrity Products Division
Domain
Semiconductor / Mixed-signal IC design
Deliverable
production ML models | product features
Required skills
RTL design (SystemVerilog, Verilog, VHDL), constrained random functional verification, CAD tools (Synthesis, DFT, STA), scripting (C/C++, Perl, Python), Unix/Linux
Preferred skills
Object-oriented programming (C++)
Responsibilities
Design RTL blocks, interpret architecture specs to generate code, verify designs using constrained random methods, create automation scripts, implement designs using CAD tools, collaborate with analog/system engineers, create technical documentation, assist in lab debug and validation
Seniority
Intern