Digital IC Design Engineer Intern
Core
Designing low-power digital signal processors, hardware accelerators, and GPUs for high-bandwidth wireless brain-computer interfaces.
Role type
Digital IC Design Engineer Intern
Builds
Neural recording and stimulation system-on-chip (SoC) for brain-computer interfaces
Domain
Biomedical engineering / Semiconductor design
Deliverable
production ML models
Required skills
SystemVerilog, C/C++, Python, digital architecture design, RTL implementation, DSP pipeline design, FPGA emulation, analog mixed-signal co-simulation
Preferred skills
architecture optimization with process technology, physical design, PCB design, firmware development, compiler back-end design, UVM verification
Technologies
SystemVerilog, SystemC, UVM, FPGA
Responsibilities
Micro-architecture design and RTL implementation of low-power digital components; Design and implementation of hardware/software interface; Application-specific architecture optimization; Complex system-on-chip verification; Collaboration on silicon bring-up tests
Seniority
Intern
