FPGA Lead/Architect/Implementor
Core
Lead the architecture, design, and implementation of next-generation ultra-high-speed Ethernet test platforms supporting IEEE802.3dj and Ultra Ethernet standards.
Role type
Senior IC FPGA Architect/Lead
Builds
Scalable Ethernet traffic generation and analysis tools for hyperscalers and semiconductor manufacturers
Domain
Datacom/Telecom, High-speed Ethernet (112Gbps/224Gbps), FPGA
Deliverable
production ML models | product features
Required skills
FPGA architecture design, RTL design (VHDL/Verilog/SystemVerilog), high-speed SerDes implementation, Ethernet Layer 1/2/3/4 protocols, Python scripting, synthesis and simulation, multi-die FPGA utilization
Preferred skills
Network protocol implementation, FPGA P&R optimization, direct vendor communication
Technologies
Xilinx Vivado, IEEE802.3dj, Ultra Ethernet, RSFEC, MACsec, PCIe, SerDes
Responsibilities
Define features at architectural and RTL levels, implement highly pipelined architectures operating at 400 MHz+, collaborate with FPGA P&R experts, communicate directly with FPGA & PHY vendors, meet with industry-leading customers on product requirements
Seniority
Senior, hands-on IC