Senior NPI Test Engineer
Core
Architect and define test strategies for complex mixed-signal/RF SiGe products from concept through production maturity, enabling next-generation high-speed communication products operating at 200Gbps and beyond.
Role type
Senior IC test engineer (mixed-signal/RF)
Builds
Reusable test IP, libraries, and frameworks for high-speed SerDes, CDRs, and signal conditioning products
Domain
Semiconductor test engineering (mixed-signal, RF, SiGe BiCMOS)
Deliverable
production ML models | product features | infrastructure
Required skills
Mixed-signal/RF test development, High-speed SerDes testing, CDR testing, Signal integrity analysis, Jitter analysis, BER testing, Analog/mixed-signal DFT (BIST, scan, boundary scan), RF/microwave test techniques (>40GHz), Statistical process control, PCB design, Test architecture design
Preferred skills
SiGe BiCMOS process technology, Automotive quality standards (AEC-Q100), Wafer-level testing, Probe card design, Test data analytics, Machine learning applications
Technologies
Advantest V93000 platform (SmarTest 7/8), C/C++, Python, TCL, Cadence, Altium
Responsibilities
Architect test strategies for complex mixed-signal/RF products, Lead development of innovative test methodologies for high-speed SerDes/CDRs, Drive DFT/testability requirements into IC architecture, Develop reusable test IP and frameworks, Mentor junior engineers, Ensure seamless transfer of test solutions to high-volume OSATs
Seniority
Senior, hands-on IC with technical leadership
