Firmware Engineer II
Core
Design and implement firmware for high-speed SERDES physical IP, including architecture development, feature implementation, and post-silicon validation.
Role type
Firmware Engineer (High-Speed SERDES PHY)
Builds
Physical IP for high-speed serial-link protocols
Domain
Semiconductor / Electronic Design Automation (EDA)
Required skills
C/C++ programming, Python, wireline communication principles, mixed-signal circuit design, digital signal processing
Preferred skills
None stated
Technologies
None stated
Responsibilities
Develop firmware architecture and implement features for high-speed SERDES; Debug firmware issues found in verification simulations; Support post-silicon testing and validation to identify and fix FW/HW issues; Interact with Product Engineering and System Validation teams to debug field IP issues and provide hot fixes; Build system-level prototype control software to validate adaptation, equalization, and control algorithms.
Seniority
Mid-level (2-4 years experience)
