Lead Digital Verification Engineer
Core
Lead verification engineer developing high-performance physical IP for industry-standard protocols, responsible for verifying digital RTL and building reusable verification components.
Role type
Senior IC digital verification engineer
Builds
High-performance physical IP for industry-standard protocols
Domain
Semiconductor / Digital Design / Verification
Required skills
SystemVerilog, UVM, Metric Driven Verification, Functional Coverage, Code Coverage, Digital Design Flow, Logic Principles, Problem Solving
Preferred skills
Python, Perl, Ruby, Sed, Awk, PCIe, USB, SATA, Ethernet, Display Port, HDMI, Formal Verification, Mixed Signal Design, Low Power Verification (CPF/UPF), Cadence Tools
Technologies
SystemVerilog, UVM, Python, Perl, Ruby, Cadence Tools
Responsibilities
Verify digital RTL, develop reusable verification components and environments, develop and execute test plans, achieve functional and code coverage closure, collaborate with design and project management teams
Seniority
Senior, hands-on IC
