Sr Application Engineer
Core
Sr Application Engineer supporting adoption of digital implementation, physical design, and static verification solutions for customers in Malaysia, focusing on PPA optimization at advanced nodes.
Role type
Senior IC application engineer (physical design)
Builds
ASIC designs for key customers in the region
Domain
Semiconductor / EDA / Physical Design
Required skills
physical design implementation, floor planning, power grid design, place and route, clock tree synthesis, timing closure, low power design, ASIC design flow, hierarchical physical design strategies, deep sub-micron technology knowledge
Preferred skills
next generation physical design methodology development, RTL design team collaboration
Technologies
7nm and below technologies
Responsibilities
Perform physical design implementation including floor planning, power grid design, place and route, clock tree synthesis, and timing closure; Work on challenging low power and high-speed designs at latest technology nodes; Participate in or lead next generation physical design methodology and flow development; Collaborate with RTL design teams to ensure successful tapeouts
Seniority
Senior, hands-on IC
