Principal application Engineer – Digital Implementation & Physical Design
Core
Lead customer adoption of digital implementation and physical design solutions, combining hands-on physical design expertise with technical leadership to optimize performance, power, and area (PPA) on advanced technology nodes.
Role type
Principal application engineer (physical design & digital implementation)
Builds
ASIC designs for key customers in the region
Domain
Semiconductor / EDA / Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
physical design implementation, floor planning, power grid design, place and route, clock tree synthesis, timing closure, low power design, ASIC design flow, hierarchical physical design strategies, deep sub-micron technology knowledge, tapeout support
Preferred skills
next generation physical design methodology development, flow development
Technologies
7nm and below technologies
Responsibilities
Perform physical design implementation including floor planning, power grid design, place and route, clock tree synthesis, and timing closure; Lead or participate in next generation physical design methodology and flow development; Collaborate with RTL design teams to ensure successful tapeouts; Drive tool adoption and influence methodologies with customer design teams and Cadence R&D
Seniority
Principal, hands-on IC with technical leadership