Principal Product Engineer - Low Power Emulation
Core
Drive low-power design and verification activities including UPF modeling, multi-voltage domain design, and power-aware simulation/emulation for SoC and ASIC projects.
Role type
Principal Product Engineer (Low Power Emulation)
Builds
Power-aware simulation and emulation solutions for customer projects
Domain
Semiconductor / EDA / Low-power design
Required skills
UPF modeling, multi-voltage domain design, power-aware simulation/emulation, RTL design/verification, SystemVerilog, UVM, SoC architecture, digital design principles, power management techniques (Power domains, Isolation, Retention, DVFS), complex system debugging
Preferred skills
Palladium/Protium/hardware emulation platforms, EDA tools and verification flows, customer-facing experience, tape-out experience in SoC or ASIC projects, power analysis and optimization
Technologies
UPF, CPF, SystemVerilog, UVM, Palladium, Protium
Responsibilities
Drive low-power design and verification activities, support customer projects on functional verification and power validation, analyze and debug complex issues related to power intent and RTL design, collaborate with global R&D teams, provide high-quality technical support and troubleshooting, contribute to methodology development and best-practice standardization
Seniority
Principal, hands-on IC with customer-facing responsibilities
