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Sr. Principal Physical Design AE

SAN JOSE💼 Full-time💰 $143,500–$143,500🗓 2026-07-20 → 2026-08-01

Core

Providing technical support and guidance to customers on backend digital design implementation, including place and route, design closure, and timing/power signoff.

Role type

Senior IC Application Engineer (Physical Design)

Builds

IC physical implementation flows and backend EDA tools

Domain

Semiconductor / EDA / Physical Design

Deliverable

client delivery

Required skills

IC physical implementation flows, backend EDA tools, advanced nodes 3nm and below, Tcl/Perl/Python scripting, technical presentations, technical evaluations/benchmarks

Preferred skills

R&D collaboration, flow augmentation, tool adoption

Technologies

Tcl, Perl, Python

Responsibilities

Guide customers on utilizing Cadence technologies to achieve design goals, conduct technical presentations and product demonstrations, drive technical evaluations/benchmarks, collaborate with R&D to enhance tools and methodologies, provide guidance to amend and augment flows using scripting languages

Seniority

Senior, hands-on IC

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