Senior IC Design Verification Application Engineer
Core
Deploy Cadence's verification platforms and AI/ML tools to solve customers' toughest verification problems in the semiconductor industry.
Role type
Senior IC Design Verification Application Engineer
Builds
Customer-specific verification solutions, technical presentations, and product demonstrations for semiconductor clients.
Domain
Semiconductor EDA (Electronic Design Automation) / Digital Design Verification
Deliverable
client delivery
Required skills
SystemVerilog, VHDL, Verilog, UVM testbench architecture, RTL debug, scripting (Perl/Python/Tcl), HDL design
Preferred skills
C/C++/SystemC, VIP deployment, protocol knowledge (JTAG, UART, PCIe, AMBA, DDR), digital design fundamentals
Technologies
Xcelium simulation platform, Verisium platform
Responsibilities
Provide front-line technical support in pre and post-sales processes, develop customer-specific verification requirements and methodologies, conduct technical presentations and product demonstrations, write technical product literature, review new product proposals and device specifications
Seniority
Senior, hands-on IC
