Digital Implementation AE Architect
Core
Technical leader driving strategic customer engagements and next-generation EDA & Agentic-AI solutions for leading semiconductor companies.
Role type
Senior IC Architect (Digital Implementation & Signoff)
Builds
Advanced design solutions for 3nm and below nodes
Domain
Semiconductor EDA / Digital Implementation
Deliverable
production ML models | product features
Required skills
Digital design fundamentals, advanced node implementation (3nm+), EDA tool ecosystems, flow customization, scripting (Tcl, Python, Perl), technical program management, executive-level stakeholder influence
Preferred skills
Prior experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus), thought leadership in industry forums
Technologies
Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus, Tcl, Python, Perl
Responsibilities
Lead technical engagements to achieve best-in-class PPA, partner with R&D to influence tool enhancements, drive complex benchmarks and flow optimizations, represent company at industry forums and author technical papers
Seniority
Senior, hands-on IC with executive-level influence
