Sr Principal Product Engineer
Core
Deploying Portable Stimulus (PSS) in large SoC verification environments and solving complex generation and solver problems for semiconductor customers. (via careerplan.io/jobs/R53758-4-sr-principal-product-engineer-at-cadence)
Role type
Sr Principal Product Engineer (SoC Verification Methodology)
Builds
Perspec (Portable Stimulus solution) for semiconductor system-level verification
Domain
Semiconductor EDA / Electronic Design Automation / System Verification
Deliverable
production ML models | product features
Required skills
SoC verification, SystemVerilog, UVM, constrained-random verification, system-level test generation, C/C++/Python scripting, debugging complex verification environments
Preferred skills
Portable Stimulus (PSS), Perspec tool, PCIe/DDR/networking protocols, ARM-based SoCs, emulation/virtual platforms, post-silicon validation, verification methodology development
Technologies
SystemVerilog, UVM, C, C++, Python, Portable Stimulus, Perspec
Responsibilities
Deploy PSS methodologies in complex SoC programs, debug generation and solver issues, investigate real-world modeling challenges, collaborate with R&D to improve PSS standard, define scalable verification methodologies, develop reference models and best practices
Seniority
Senior, hands-on IC
