Principal Firmware Engineer
Core
Develop firmware for DDR5 PHY using microcontrollers, including bare-metal programming, low-level API development, and training algorithm implementation.
Role type
Principal Firmware Engineer (DDR PHY)
Builds
DDR5 PHY IP front-end designs
Domain
Semiconductor / Memory Interface / High-speed SerDes
Deliverable
production ML models | product features
Required skills
C programming, bare-metal programming, DDR5 JEDEC spec knowledge, Microcontroller programming, RTL simulation debugging, Shell/Perl/Python/TCL scripting, Verification EDA tools
Preferred skills
Experience with High-speed SerDes or Memory interface Physical Layer blocks
Technologies
C, Verilog, Microcontrollers, DDR5, RTL simulators, Waveform viewers
Responsibilities
Develop firmware for DDR5 PHY using microcontrollers; Develop low-level APIs on Microcontrollers; Collaborate with hardware designers and memory subsystem architects to derive training algorithms; Collaborate with verification team to deduce firmware-hardware co-verification plan; Develop and Debug firmware in RTL based hardware simulations; Develop and Debug on Silicon bring-up boards.
Seniority
Principal, hands-on IC
