Sr. Engineer, Ethernet IP
Core
Architecting, enabling, and optimizing low-level firmware for high-speed Ethernet networking subsystems to power next-generation AI infrastructure.
Role type
Senior Embedded Firmware Engineer (Hardware-Software Boundary)
Builds
High-performance networking hardware-software integration for AI compute platforms
Domain
AI Hardware / Semiconductor / High-Speed Networking
Deliverable
production ML models | infrastructure
Required skills
Bare-metal firmware development, Ethernet MAC/PHY/PCS architecture, SerDes configuration, Link-training algorithms, Auto-negotiation protocols, Silicon bring-up, Signal integrity debugging, Protocol-level timing analysis
Preferred skills
RISC-V CPU experience, RTL-to-firmware translation, Oscilloscope/Logic analyzer usage
Technologies
Ethernet, SerDes, PHY, MAC, PCS, RISC-V
Responsibilities
Develop and maintain low-level firmware to manage Ethernet MAC, PHY, and SerDes components; Drive silicon bring-up and validation of networking subsystems in the lab; Implement and optimize link-training algorithms and auto-negotiation protocols; Debug complex hardware-software interactions, including signal integrity issues and protocol-level timing bugs
Seniority
Senior, hands-on IC