Product Engineer II (DDR IP)
Core
Pre-sales and post-sales technical support for high-performance Memory PHY IP products (DDR, LPDDR, HBM, GDDR), acting as the primary interface between customers, R&D, and System Validation teams.
Role type
Product Engineer II (Memory IP)
Builds
Memory subsystem products (Controller + PHY) for consumer, hyperscale computing, 5G, automotive, aerospace, industrial, and health applications.
Domain
Electronic design automation (EDA), semiconductor IP, memory protocols
Deliverable
client delivery
Required skills
DDR/LPDDR/HBM/GDDR IP knowledge, Verilog RTL design, gate-level verification, synthesis, static timing analysis, DFT flows, package and board design review, SI/PI review participation
Preferred skills
Memory PHY and DSP architecture experience, embedded microcontroller firmware experience
Technologies
DDR5/4/3, LPDDR5/4/3, HBM3, GDDR6, Verilog, RTL, gate-level simulation
Responsibilities
Supporting pre-silicon integration and implementation of memory subsystem products; assisting with internal system integration and QA testing; analyzing and resolving complex subsystem application issues; supporting SOC integration reviews; assisting customers with RTL and gate-level simulations; assisting with timing closure and physical integration; participating in product documentation development; supporting post-silicon bringup and production test activities; leveraging AI-powered tools for productivity and analytics
Seniority
Mid-level IC engineer (2+ years experience)
