CareerPlanGet AI match score →

Memory Controller Digital Engineer

HsinChu💼 Full-time🗓 2026-03-29 → 2026-07-22

Core

Designing memory system architecture and developing DRAM controller IP for System on Chip (SoC) applications.

Role type

Digital Engineer (Memory Controller)

Builds

DRAM controller IP including high-speed digital PHY, scheduler, and low power management units.

Domain

Semiconductor / SoC Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

RTL implementation, high-speed digital PHY design, low power management, design for test, static timing analysis, project integration

Responsibilities

Memory system architecture design, DRAM controller IP development, DRAM controller IP integration

Sourced via mediatek · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.
Apply on Mediatek ↗