Principal Digital Design Engineer
Core
Lead the development of the digital part of new mixed-signal products (ASSP and FPGA) for healthcare applications, driving projects from architecture through tape-out.
Role type
Principal Digital Design Engineer (Mixed-Signal SoC)
Builds
Application Specific Standard Products (ASSP) and System-on-Chip (SoC) for Disease Management, Patient Monitoring, and Smart Hospital applications.
Domain
Semiconductor / Healthcare / Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
RTL design (System Verilog), SoC architecture, chip-level verification, synthesis, timing analysis, silicon debug, mixed-signal design, project leadership, mentorship
Preferred skills
Python/Perl/Shell scripting, UVM methodology, ARM/RISC-V sub-system verification
Technologies
RTL, System Verilog, Standard cells, FPGA, UVM, ARM, RISC-V
Responsibilities
Define top-level chip requirements, produce efficient designs meeting functional/power/timing objectives, supervise synthesis and timing analysis, mentor junior engineers, collaborate with cross-functional teams (Product, Test, Marketing)
Seniority
Principal, hands-on IC with strategic leadership
