IC Verification Engineer
Core
Build test plans, functional coverage, and scalable test benches for Block/Core/SoC verification using System Verilog and UVM.
Role type
IC Verification Engineer
Builds
Verification environments and testbenches for semiconductor blocks, cores, and System-on-Chip (SoC)
Domain
Semiconductor / Hardware Verification
Required skills
System Verilog, UVM/VMM, Object-Oriented Programming, Functional Coverage, Pseudo-random test generation, Regression debugging
Preferred skills
PCI Express protocol knowledge
Technologies
System Verilog, UVM, VMM
Responsibilities
Build test plans with all features for Block/Core/SoC, Write scalable and re-usable test benches, Develop Pseudo-random tests to verify and get to full Functional Coverage, Debug Regression failures and analyze Functional coverage gaps, Document verification strategy including Test plans and Testbench
Seniority
Mid-Senior (5+ years with Bachelor's or 3+ years with Master's)
