Analog IC Layout Engineer
Core
Implement analog and mixed-signal layouts in nanometer CMOS technologies for custom Mixed-Signal ASIC products.
Role type
Senior/Principal Analog/Mixed-Signal Layout Engineer
Builds
Custom Mixed-Signal ASIC products
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features
Required skills
Nanometer CMOS IC layout, Physical verification flows, High voltage verification techniques, Floorplanning, Tapeout planning, IP assembly, Team supervision
Preferred skills
SKILL scripting, Perl/Python, Calibre SRVF, Small digital block place and route
Technologies
Cadence Virtuoso Layout-XL, Mentor Graphics Calibre
Responsibilities
Layout analog and mixed-signal circuits, Plan and organize layout schedules and floorplans, Assemble top level IPs and chips for tapeout, Supervise local and remote layout resources, Train junior staff on layout techniques
Seniority
Senior/Principal, hands-on IC with mentorship
