Foundation IP Memory Verification Engineer
Core
Design engineer responsible for memory design validation, functional verification, and signal integrity analysis for custom memory macros and memory compilers in AI products.
Role type
Senior IC memory verification engineer
Builds
Foundation IP for AI products including memory compilers, logic cells, and custom macros
Domain
Semiconductor / AI hardware
Deliverable
production ML models
Required skills
Memory circuit design, transistor-level simulation, signal integrity analysis, EM/IR analysis, automation scripting, timing characterization, power-up/lock-up analysis
Preferred skills
Device physics understanding, memory behavioral/physical models, DFT schemes, chip-level integration
Technologies
SPICE simulators, EM/IR analysis tools, automation scripts
Responsibilities
Perform functional verification and root cause analysis for design discrepancies; Conduct signal integrity analysis and propose solutions; Execute transistor-level simulations for power-up/lock-up and timing validation; Perform EM/IR analysis to evaluate timing margins; Develop automation scripts for verification flow; Support silicon debug and model correlation; Collaborate on memory characterization and validation plans
Seniority
Senior, hands-on IC
