Signal Integrity Engineer
Core
Develop next-generation ASIC products focusing on parallel interfaces, 2.5D, and 3D interconnect technologies for AI/ML, cloud computing, and networking.
Role type
Senior IC Signal Integrity/Power Integrity Engineer
Builds
Advanced ASIC products and interconnect IP for customers and internal development
Domain
Semiconductor / IC Design / Signal Integrity
Deliverable
production ML models | product features
Required skills
Mask-based timing signoff, Electromagnetic extraction and modeling, AC and transient analysis of PDN, IO channel analysis, Pre-layout modeling of transceivers, EDA tool automation, TCL/Python scripting, DDR/LPDDR/HBM SI/PI sign-off flows
Preferred skills
Experience with IC, Package, and PCB database types
Technologies
SPICE, EDA tool suites, TCL, Python
Responsibilities
Perform mask-based timing signoff using time domain simulations, Conduct electromagnetic extraction and modeling of signal/power delivery channels, Analyze AC and transient behavior of Power Distribution Networks, Execute IO channel analysis, Automate sign-off processes and improve tool accuracy, Generate analysis results and support pre-sales activities
Seniority
Senior, hands-on IC
