Research Associate (IC Design)
Core
Integrate Hardware AES and ASCON accelerators into the RISC-V CVA6 core, including custom instruction definition, toolchain modification, and verification.
Role type
IC Design Research Associate (RISC-V Architecture)
Builds
RISC-V CVA6 core with cryptographic accelerator integration
Domain
Semiconductor / Hardware Design / Cryptography
Deliverable
production ML models | product features | infrastructure
Required skills
RISC-V architecture, custom instruction extensions, pipeline modification, HDL (Verilog/VHDL/SystemVerilog), toolchain modification (GCC/LLVM), FPGA prototyping
Preferred skills
ASIC/FPGA design flows (synthesis, place & route, timing closure), hardware cryptography implementation (AES, ASCON)
Responsibilities
Integrate AES and ASCON accelerators into the CVA6 core; Define and implement custom RISC-V instructions; Modify decode and execution stages; Develop toolchain support for custom instructions; Conduct performance and latency simulations; Collaborate on testing and debugging
Seniority
Mid-level, hands-on IC
