Senior Engineer - CPU Verification (RISCV Vector,ALU, FPU Verification)
Core
Own verification planning and execution for Vector, ALU, and floating-point blocks in CPU cores, driving strategy from unit level to core level integration.
Role type
Senior IC CPU verification engineer (RISC-V)
Builds
CPU cores (Vector, ALU, FPU) for high-performance compute platforms
Domain
Semiconductor / CPU Design / RISC-V
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, UVM, computer architecture, CPU microarchitecture, Python/C++ scripting, test planning, coverage analysis, debug, assertion development
Preferred skills
high-performance out-of-order CPU core verification, formal verification, control-heavy behavior verification
Technologies
SystemVerilog, UVM, Python, C/C++, RISC-V
Responsibilities
Drive verification strategy and testbench development for complex execution-pipeline behaviors; Develop robust verification environments and coverage models; Partner with architecture and design teams to review specifications and identify risks; Drive root-cause debug across RTL and verification infrastructure; Contribute reusable methodology and automation for future CPU core programs.
Seniority
Senior, hands-on IC
