Staff Engineer
Core
Hands-on development of high-performance CPU verification using System Verilog and UVM for RISC-V architectures.
Role type
Senior IC verification engineer (CPU)
Builds
Verification environments and test plans for RISC-V processors
Domain
Semiconductor / Chip Design / CPU Verification
Required skills
System Verilog, UVM methodology, Object-oriented programming, CPU micro-architecture knowledge, Bus interface knowledge (AXI, PCIe), Test generation, Python scripting
Preferred skills
Experience with x86 or ARM architectures, Third-party VIP integration
Technologies
System Verilog, UVM, Python, AXI, PCIe
Responsibilities
Write test cases for CPU verification, Use test generators to create targeted tests, Collaborate on coverage and test-plan scenarios
Seniority
Senior, hands-on IC
