CPU Core Design Verification Testbench Lead
Core
Lead hands-on CPU core-level testbench development and verification for high-performance out-of-order RISC-V cores.
Role type
Senior IC CPU Design Verification Testbench Lead
Builds
High-performance RISC-V CPU cores, clusters, and chip-level compute platforms
Domain
Semiconductor / CPU Microarchitecture / RISC-V
Deliverable
production ML models
Required skills
CPU verification, CPU testbench development, out-of-order CPU microarchitecture, CVM methodology, UVM, RTL, waveform analysis, regression management, cross-functional debug, AI-assisted verification workflows
Preferred skills
Python orchestration, AI agent integration for verification triage, C/C++ functional modeling, assembly programming
Technologies
CVM, UVM, Python, C++, Assembly, RISC-V
Responsibilities
Own and evolve CVM-based verification methodology and reusable testbench components; Plan and drive functional verification for CPU core features, ISA behavior, and microarchitectural scenarios; Develop UVM, assembly, C/C++ stimulus, and C++ functional models for RISC-V extensions and un-core components; Debug regressions, close coverage, and improve core, cluster, and chip-level testbenches across simulation, emulation, and post-silicon environments; Develop testbench and tooling infrastructure combining Python orchestration with specialized AI agents to accelerate triage and root-cause analysis
Seniority
Senior, hands-on IC
