Logic Design Engineer
Core
Architect, design, and implement breakthrough Ethernet/networking IP for next-generation SoCs in automotive, industrial, and edge computing markets.
Role type
IC logic design engineer (networking IP)
Builds
Scalable micro-architecture and Verilog RTL implementations for Ethernet/TSN IP
Domain
Semiconductor hardware design, networking protocols (Ethernet, TSN, TCP/IP)
Required skills
Verilog RTL design, logic synthesis, timing closure, micro-architecture design, front-end design tools, trade-off analysis (performance/area/complexity), IP development methodology
Preferred skills
TCP/IP protocols, router/bridge/switch experience, security/cryptography, algorithm development, SoC integration
Technologies
Verilog, IEEE Time Sensitive Networking (TSN), Lint, CDC, Synthesis, STA, LEC
Responsibilities
Architect and implement Ethernet/networking IP, perform trade-off analysis, ensure front-end to back-end handoff quality checks, provide technical support and code reviews, collaborate with verification engineers, drive continuous improvement in design methodology
Seniority
Mid-level, hands-on IC
