Principal Digital Design Engineer
Core
Design, develop, and optimize digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products across the full design cycle.
Role type
Principal Digital Design Engineer (ASIC/FPGA)
Builds
Digital blocks, subsystems, and SoCs for semiconductor products
Domain
Semiconductor / VLSI / Digital Logic
Deliverable
production ML models | product features
Required skills
Verilog, SystemVerilog, VHDL, RTL design, UVM/OVM verification, logic synthesis, Static Timing Analysis, FSM design, clock domain crossing, low-power design, bus protocols (AXI, AHB, APB), EDA tools, waveform debugging
Preferred skills
UVM methodology, DFT concepts, scripting (Python, Perl, TCL), hardware-software co-design, high-speed interfaces, SoC design
Technologies
ModelSim, VCS, Xcelium, Design Compiler, Genus, PrimeTime, Verdi, SimVision
Responsibilities
Architect and implement complex digital blocks, perform functional verification and testbench development, execute logic synthesis and timing analysis, debug design issues at RTL/gate/silicon levels, collaborate with verification and physical design teams, ensure PPA targets, support post-silicon validation
Seniority
Senior, hands-on IC
