Principal IC Design Verification Engineer
Core
Architect, design, implement, and verify Ethernet/networking IP and SoC products for automotive, industrial, and edge computing markets.
Role type
Principal IC Design Verification Engineer (Networking IP & SoC)
Builds
Networking switch and network controller IP cores (NETC) integrated into next-generation SoCs
Domain
Semiconductor / Hardware Engineering / Networking
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, IP & SoC development methodology, EDA tools, Python/TCL/Perl scripting, verification infrastructure design, test generation, coverage analysis, defect debugging, trade-off analysis
Preferred skills
Formal verification, Functional Safety Verification, TCP/IP protocols, router/bridge/switch data products, security/cryptography
Technologies
System Verilog, UVM, Python, TCL, Perl, Makefile, Shell, Git
Responsibilities
Architect and verify Ethernet/networking IP for SoCs; Design and implement UVM verification environments; Perform performance/complexity trade-off analysis; Collaborate with architecture and design teams on IP delivery; Produce functional and implementation specifications; Build directed and random verification tests; Debug test failures and resolve defects; Review and optimize functional and code coverage metrics; Drive continuous improvement in verification methodology
Seniority
Principal, hands-on IC
