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Junior Mixed Signal Verification Engineer

Catania💼 Full-time🗓 2026-06-24 → 2026-07-31

Core

Ensuring high quality designs for analog and mixed-signal IPs by creating simulation test cases, models, and checkers.

Role type

Junior IC mixed-signal verification engineer

Builds

High-performance microcontrollers (MCUs) and System-on-Chip (SoC) products for industrial automation and autonomous home applications

Domain

Semiconductor / Mixed-Signal IC Design

Deliverable

production ML models | product features

Required skills

System Verilog, Verilog-AMS, Verilog-A, analog and mixed-signal fundamentals, simulation execution, coverage tracking, top-level analysis, DFT strategy

Preferred skills

Master's degree in Electronic Engineering, 6+ months experience in analog mixed-signal design/verification

Technologies

System Verilog, Verilog-AMS, Verilog-A

Responsibilities

Develop SV Real Number and Verilog-AMS models for analog blocks; Run simulations and track coverage of verification plans; Find design bugs/issues in architecture/design of Analog/Mixed Signal IPs; Perform top level analysis & verification of test-modes & DFT strategy for analog blocks

Seniority

Junior, hands-on IC

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