CareerPlanGet AI match score →

2026 Campus - SoC Backend Design Engineer

Tianjin (Teda)💼 Full-time🗓 2025-07-15 → 2026-07-31

Core

Physical implementation of IP, Subsystem, or IC design from RTL synthesis to GDS, including floor planning, routing, and timing convergence.

Role type

SoC Backend Design Engineer

Builds

Integrated circuits and subsystems

Domain

Semiconductor / SoC Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

RTL synthesis, floor planning, routing, static timing analysis (STA), DRC/LVS verification, electromigration analysis, IR drop analysis, Perl/TCL/Python scripting, Linux/Unix environment usage

Preferred skills

SoC design experience, backend design experience

Technologies

Perl, TCL, Python, Linux, Unix

Responsibilities

Perform physical implementation of IP, Subsystem, or IC design; Optimize design for timing convergence and technology/reliability rules; Contribute to defining best physical design strategy per technology node

Seniority

Entry-level / Campus hire

Sourced via workday · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.
Apply on Workday ↗