<Data Center> Datacenter Compute Accelerator Architect
Core
Lead the design and integration of dedicated hardware accelerators (crypto, compression, networking, memory movement) within next-generation datacenter silicon to maximize system-level performance and efficiency.
Role type
Senior IC hardware architect (datacenter compute accelerators)
Builds
On-chip uncore accelerators integrated into coherent interconnects and memory hierarchies for hyper-scale cloud environments
Domain
Semiconductor hardware design / Datacenter infrastructure
Required skills
Microarchitecture design, SoC integration, HW/SW co-design, Virtualization implementation, PPA analysis, RTL implementation, Verification, Silicon bring-up
Preferred skills
Experience with AMBA CHI, NoC, SR-IOV, PASID, SMMU/IOMMU, Tensor cores, DMA engines
Technologies
AMBA CHI, NoC, SR-IOV, PASID, SMMU/IOMMU, RTL, Verification tools
Responsibilities
Define microarchitecture and write detailed specifications for tightly-coupled uncore accelerators; Integrate accelerator blocks into coherent interconnects and memory subsystems; Partner with kernel and driver engineers to define software programming models and APIs; Implement virtualization and security features for cloud-native environments; Conduct rigorous PPA analysis and performance modeling; Serve as technical focal point during RTL implementation, verification, and silicon bring-up
Seniority
Senior, hands-on IC
