SoC Physical Design Engineer_ChuPei
Core
Implementing 2~4nm SoC designs, managing the full physical design flow from synthesis to sign-off.
Role type
SoC Physical Design Engineer
Builds
2~4nm System-on-Chip (SoC) designs
Domain
Semiconductor / SoC Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
synthesis, DFT, floorplanning, clock planning, place and route, timing closure, ECO, IR signoff, physical verification
Responsibilities
Work on 2~4nm design implementation, methodology, and sign-off; Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification; Manage schedule, resolve design and flow issues, drive methodologies and execution
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