Mixed-Signal Digital IC Design Engineer(Serdes, High Speed Interface)
Core
Architecting, coding, and integrating Serdes/High Speed Interface PHYD IP for digital logic and analog co-simulation.
Role type
Mixed-Signal Digital IC Design Engineer (Serdes, High Speed Interface)
Builds
PHYD IP blocks for high-speed interfaces
Domain
Semiconductor IC Design, Serdes, High-Speed Interfaces
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Serdes architecture planning, RTL coding, PHYD IP front-end/back-end integration, IP verification, analog-digital co-simulation
Responsibilities
Planning Serdes/High speed interface related PHYD IP architecture, Coding Serdes/High speed interface related PHYD IP RTL, Integrating Serdes/High speed interface related PHYD IP front-end and back-end, Collaborating with MAC design and DV teams for IP verification, Collaborating with Analog design team for PHY co-simulation