<Data center>Senior SerDes Design Verification Engineer
Core
Design verification for SerDes in I/O Chiplet, collaborating with analog/digital/algorithm design teams and system application teams from prototype test chip to mass production.
Role type
Senior SerDes Design Verification Engineer
Builds
I/O Chiplet prototypes and mass production units
Domain
Semiconductor / High-Speed I/O Interfaces
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SerDes design verification, test script implementation, test firmware design, automatic test program establishment, data analysis, failure analysis, analog IP qualification, PHY performance validation
Responsibilities
Collaborate with analog/digital/algorithm design teams and system application teams; Implement test scripts or design test firmware for SerDes Analog IP qualification and PHY performance validation; Establish automatic test programs and perform data analysis for SerDes Analog IP and PHY characterization and failure analysis.
Seniority
Senior, hands-on IC