<Data center>Senior Digital Design and IP Integration Engineer
Core
Own the top-level integration of internal and third-party IPs into SOC or FPGA platforms, ensuring interface compatibility and clock/reset domain correctness.
Role type
Senior Digital Design and IP Integration Engineer
Builds
SOC or FPGA platforms
Domain
Semiconductor hardware design
Deliverable
production ML models | product features | infrastructure
Required skills
IP integration, interface compatibility, clock/reset domain management, timing analysis, CDC/RDC resolution, floorplanning, synthesis constraints
Preferred skills
collaboration with architects, firmware teams, and validation teams
Technologies
SOC, FPGA
Responsibilities
Define specifications with architects, support physical design teams through synthesis constraints, partner with firmware and validation teams for bring-up and validation
Seniority
Senior, hands-on IC
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