[2027 Internship] Physical Verification Software CAD Intern
Core
Execute design rule checks, debug physical verification issues, and perform basic reporting on real chip designs during full chip integration.
Role type
IC physical verification intern (chip design)
Builds
Physical verification reports and debugs for chip tape-out
Domain
Semiconductor / Physical Design
Required skills
Design rule checks (DRC), Physical verification, Layout tools (Synopsys Laker), DRC tools (Mentor Calibre), Scripting (Tcl/Python/csh), Linux environment, Project risk assessment
Preferred skills
Full chip construction knowledge, Backend closure experience, Cross-team collaboration
Technologies
Synopsys Laker, Mentor Calibre, Linux, Tcl, Python, csh
