HBM SIPI, Staff Engineer
Core
Execute high-quality Signal Integrity (SI) and Power Integrity (PI) analysis for interposers, packages, and silicon channels to ensure HBM design sign-off and product success.
Role type
Staff Engineer, HBM SI/PI Design Architecture
Builds
High Bandwidth Memory (HBM) solutions for AI/ML accelerators and high-performance computing platforms
Domain
Semiconductor / Advanced Packaging / High-Speed Interfaces
Deliverable
production ML models
Required skills
Signal integrity (SI) modeling and analysis, Power integrity (PI) modeling and analysis, Electromagnetic and transmission line theory, I/O design, Circuit simulation (Keysight ADS, Synopsys HSPICE), Frequency-domain characterization, Time-domain analysis, PDN architecture, EDA tool automation
Preferred skills
2.5D/3D advanced packaging design (CoWoS, EMIB, interposer-based), Mask-based timing budget and jitter analysis, High-speed interface expertise (DDR, HBM, UCIe, PCIe, SERDES), Electromagnetic extraction and modeling (ANSYS HFSS/SIwave, Cadence PowerSI/PowerDC)
Technologies
Keysight ADS, Synopsys HSPICE, ANSYS HFSS/SIwave, Cadence PowerSI/PowerDC, SPICE, ADS
Responsibilities
Perform signal integrity channel analysis for 2.5D and 3D silicon interposers, Conduct mask-based timing analysis using time-domain simulations, Support power integrity and PDN analysis including impedance modeling, Perform electromagnetic extraction and modeling of signal and power delivery channels, Automate sign-off processes and collaborate with EDA suppliers
Seniority
Staff, hands-on IC with strategic oversight
