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Staff/Principal Engineer - Design Verification (SoC expert/lead)

San Jose, CA💼 Full-time💰 $168,000–$168,000🗓 2026-05-05 → 2026-07-31

Core

Lead functional verification for ASIC controllers, defining end-to-end verification architecture and strategy to ensure successful tape-outs.

Role type

Staff/Principal IC Design Verification Lead (SoC)

Builds

ASIC controllers for memory and storage solutions

Domain

Semiconductor / SoC Design Verification

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

SoC verification architecture, SystemVerilog, UVM, test plan development, emulation platforms, Gen-AI tools for verification

Preferred skills

PCIe/NVMe/NAND/DDR/CPU subsystem verification, leading large verification efforts, modern Gen-AI solutions in workflows

Technologies

SystemVerilog, UVM, emulation platforms, Gen-AI tools

Responsibilities

Define end-to-end SoC verification architecture and strategy; Develop comprehensive test plans across module, subsystem, and SoC levels; Lead and coordinate parallel verification efforts across multiple teams; Apply advanced verification methodologies including emulation; Leverage Gen-AI tools to improve verification efficiency

Seniority

Staff/Principal, hands-on IC with leadership

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